The first encompassing treatise of this new and very important field puts the known physical limitations for classic 2D microelectronics into perspective with the requirements for further microelectronics developments and market necessities. This two-volume handbook presents 3D solutions to the feature density problem, addressing all important issues, such as wafer processing, die bonding, packaging technology, and thermal aspects. It begins with an introductory part, which defines necessary goals, existing issues and relates 3D integration to the semiconductor roadmap of the industry. Before going on to cover processing technology and 3D structure fabrication strategies in detail. This is followed by fields of application and a look at the future of 3D integration. The editors have assembled contributions from key academic and industrial players in the field, including Intel, Micron, IBM, Infineon, Qimonda, NXP, Philips, Toshiba, Semitool, EVG, Tezzaron, Lincoln Labs, Fraunhofer, RPI, IMEC, CEA-LETI and many others.

Edited by key figures in 3D integration and written by top authors from high-tech companies and renowned research institutions, this book covers the intricate details of 3D process technology. As such, the main focus is on silicon via formation, bonding and debonding, thinning, via reveal and backside processing, both from a technological and a materials science perspective. The last part of the book is concerned with assessing and enhancing the reliability of the 3D integrated devices, which is a prerequisite for the large-scale implementation of this emerging technology. Invaluable reading for materials scientists, semiconductor physicists, and those working in the semiconductor industry, as well as IT and electrical engineers.